[AMDGPU] Add .entry_point back into PAL metadata #125505
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Trying again - #124925 seemed to get stuck. |
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@llvm/pr-subscribers-backend-amdgpu Author: David Stuttard (dstutt) ChangesFull diff: https://github.com/llvm/llvm-project/pull/125505.diff 12 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
index 1e76bf7056cc81..296031e4a068fd 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
@@ -27,6 +27,28 @@
using namespace llvm;
using namespace llvm::AMDGPU;
+// Return the PAL metadata hardware shader stage name.
+static const char *getStageName(CallingConv::ID CC) {
+ switch (CC) {
+ case CallingConv::AMDGPU_PS:
+ return ".ps";
+ case CallingConv::AMDGPU_VS:
+ return ".vs";
+ case CallingConv::AMDGPU_GS:
+ return ".gs";
+ case CallingConv::AMDGPU_ES:
+ return ".es";
+ case CallingConv::AMDGPU_HS:
+ return ".hs";
+ case CallingConv::AMDGPU_LS:
+ return ".ls";
+ case CallingConv::AMDGPU_Gfx:
+ llvm_unreachable("Callable shader has no hardware stage");
+ default:
+ return ".cs";
+ }
+}
+
// Read the PAL metadata from IR metadata, where it was put by the frontend.
void AMDGPUPALMetadata::readFromIR(Module &M) {
auto *NamedMD = M.getNamedMetadata("amdgpu.pal.metadata.msgpack");
@@ -232,8 +254,18 @@ void AMDGPUPALMetadata::setEntryPoint(unsigned CC, StringRef Name) {
if (isLegacy())
return;
// Msgpack format.
+ // Entry point is updated to .entry_point_symbol and is set to the function
+ // name
getHwStage(CC)[".entry_point_symbol"] =
MsgPackDoc.getNode(Name, /*Copy=*/true);
+
+ // Set .entry_point which is defined
+ // to be _amdgpu_<stage> and _amdgpu_cs for non-shader functions
+ SmallString<16> EPName("_amdgpu_");
+ raw_svector_ostream EPNameOS(EPName);
+ EPNameOS << getStageName(CC) + 1;
+ getHwStage(CC)[".entry_point"] =
+ MsgPackDoc.getNode(EPNameOS.str(), /*Copy=*/true);
}
// Set the number of used vgprs in the metadata. This is an optional
@@ -943,28 +975,6 @@ msgpack::MapDocNode AMDGPUPALMetadata::getGraphicsRegisters() {
return GraphicsRegisters.getMap();
}
-// Return the PAL metadata hardware shader stage name.
-static const char *getStageName(CallingConv::ID CC) {
- switch (CC) {
- case CallingConv::AMDGPU_PS:
- return ".ps";
- case CallingConv::AMDGPU_VS:
- return ".vs";
- case CallingConv::AMDGPU_GS:
- return ".gs";
- case CallingConv::AMDGPU_ES:
- return ".es";
- case CallingConv::AMDGPU_HS:
- return ".hs";
- case CallingConv::AMDGPU_LS:
- return ".ls";
- case CallingConv::AMDGPU_Gfx:
- llvm_unreachable("Callable shader has no hardware stage");
- default:
- return ".cs";
- }
-}
-
msgpack::DocNode &AMDGPUPALMetadata::refHwStage() {
auto &N =
MsgPackDoc.getRoot()
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
index 0818f607da0a5c..96775f4763e34b 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
@@ -8,6 +8,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .cs:
+; GCN-NEXT: .entry_point: _amdgpu_cs
; GCN-NEXT: .entry_point_symbol: cs_amdpal
; GCN-NEXT: .scratch_memory_size: 0
; GCN: .registers:
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-es.ll b/llvm/test/CodeGen/AMDGPU/amdpal-es.ll
index e37d22c7df372d..1379246c32573c 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-es.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-es.ll
@@ -7,6 +7,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .es:
+; GCN-NEXT: .entry_point: _amdgpu_es
; GCN-NEXT: .entry_point_symbol: es_amdpal
; GCN-NEXT: .scratch_memory_size: 0
; GCN: .registers:
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
index d847f75a5c0939..1fba34a50094f0 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
@@ -8,6 +8,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .gs:
+; GCN-NEXT: .entry_point: _amdgpu_gs
; GCN-NEXT: .entry_point_symbol: gs_amdpal
; GCN-NEXT: .scratch_memory_size: 0
; GCN: .registers:
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
index 74f5f440c99d79..53c6b95f073515 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
@@ -8,6 +8,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .hs:
+; GCN-NEXT: .entry_point: _amdgpu_hs
; GCN-NEXT: .entry_point_symbol: hs_amdpal
; GCN-NEXT: .scratch_memory_size: 0
; GCN: .registers:
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll b/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
index 287cc1201a3c58..ebe753134a42d5 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
@@ -7,6 +7,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .ls:
+; GCN-NEXT: .entry_point: _amdgpu_ls
; GCN-NEXT: .entry_point_symbol: ls_amdpal
; GCN-NEXT: .scratch_memory_size: 0
; GCN: .registers:
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll b/llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
index e1767182c359df..32f19e2af32ec7 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
@@ -11,6 +11,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .ps:
+; GCN-NEXT: .entry_point: _amdgpu_ps
; GCN-NEXT: .entry_point_symbol: amdpal_psenable
; GCN-NEXT: .scratch_memory_size: 0
; GCN: .registers:
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-vs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
index b225d978601ab8..853d221ee3aabd 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
@@ -8,6 +8,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .vs:
+; GCN-NEXT: .entry_point: _amdgpu_vs
; GCN-NEXT: .entry_point_symbol: vs_amdpal
; GCN-NEXT: .scratch_memory_size: 0
; GCN: .registers:
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal.ll b/llvm/test/CodeGen/AMDGPU/amdpal.ll
index 97fcf0606b5b78..171df029615ed2 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal.ll
@@ -86,6 +86,7 @@ declare void @llvm.amdgcn.raw.ptr.buffer.store.f32(float, ptr addrspace(8), i32,
; PAL-NEXT: amdpal.pipelines:
; PAL-NEXT: - .hardware_stages:
; PAL-NEXT: .cs:
+; PAL-NEXT: .entry_point: _amdgpu_cs
; PAL-NEXT: .entry_point_symbol: scratch2_cs
; PAL-NEXT: .scratch_memory_size: 0x10
; PAL-NEXT: .sgpr_count: 0x
diff --git a/llvm/test/CodeGen/AMDGPU/elf-notes.ll b/llvm/test/CodeGen/AMDGPU/elf-notes.ll
index e91bed464136f8..b205678bd90850 100644
--- a/llvm/test/CodeGen/AMDGPU/elf-notes.ll
+++ b/llvm/test/CodeGen/AMDGPU/elf-notes.ll
@@ -66,6 +66,7 @@
; OSABI-PAL-ELF: amdpal.pipelines:
; OSABI-PAL-ELF: - .hardware_stages:
; OSABI-PAL-ELF: .cs:
+; OSABI-PAL-ELF: .entry_point: _amdgpu_cs
; OSABI-PAL-ELF: .entry_point_symbol: elf_notes
; OSABI-PAL-ELF: .scratch_memory_size: 0
; OSABI-PAL-ELF: .sgpr_count: 96
diff --git a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
index f89341d539a0f6..7536e83a9da6bd 100644
--- a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
+++ b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
@@ -53,6 +53,7 @@
; CHECK-NEXT: .cs:
; CHECK-NEXT: .checksum_value: 0x9444d7d0
; CHECK-NEXT: .debug_mode: false
+; CHECK-NEXT: .entry_point: _amdgpu_cs
; CHECK-NEXT: .entry_point_symbol: _amdgpu_cs_main
; CHECK-NEXT: .excp_en: 0
; CHECK-NEXT: .float_mode: 0xc0
@@ -109,6 +110,7 @@
; CHECK-NEXT: .wgp_mode: false
; CHECK-NEXT: .gs:
; CHECK-NEXT: .debug_mode: false
+; CHECK-NEXT: .entry_point: _amdgpu_gs
; CHECK-NEXT: .entry_point_symbol: gs_shader
; CHECK-NEXT: .ieee_mode: false
; CHECK-NEXT: .lds_size: 0x200
@@ -120,6 +122,7 @@
; CHECK-NEXT: .wgp_mode: true
; CHECK-NEXT: .hs:
; CHECK-NEXT: .debug_mode: false
+; CHECK-NEXT: .entry_point: _amdgpu_hs
; CHECK-NEXT: .entry_point_symbol: hs_shader
; CHECK-NEXT: .ieee_mode: false
; CHECK-NEXT: .lds_size: 0x1000
@@ -131,6 +134,7 @@
; CHECK-NEXT: .wgp_mode: true
; CHECK-NEXT: .ps:
; CHECK-NEXT: .debug_mode: false
+; CHECK-NEXT: .entry_point: _amdgpu_ps
; CHECK-NEXT: .entry_point_symbol: ps_shader
; CHECK-NEXT: .ieee_mode: false
; CHECK-NEXT: .lds_size: 0
diff --git a/llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll b/llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
index e3a6240aac0057..fdc1e6abb051f2 100644
--- a/llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
+++ b/llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
@@ -12,6 +12,7 @@
; GCN-NEXT: amdpal.pipelines:
; GCN-NEXT: - .hardware_stages:
; GCN-NEXT: .cs:
+; GCN-NEXT: .entry_point: _amdgpu_cs
; GCN-NEXT: .entry_point_symbol: _amdgpu_cs_main
; GCN-NEXT: .scratch_memory_size: 0
; SI-NEXT: .sgpr_count: 0x11
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Feb 11, 2025
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